关键词： 数字信号处理器   时钟同步信号   浮点运算   DSP   并行技术   多处理器  

摘要： 近年来,通用DSP的发展速度已超过了专用DSP,而且有些DSP的浮点运算能力是专用DSP无法比拟的。文章主要介绍了ADSP-TS101S的性能和特点,并分析了以其作为处理单元构成并行处理系统的优缺点。

关键词： 处理器体系结构   计算机系统   软件设计流程   设计方法   串行通讯   软件结构   多处理器   外围芯片   办公自动化系统   服务器负载  

摘要： 0308407ARM 微处理器体系结构及其嵌入式 SOC[刊]/蒋亚群//计算机工程.—2002,28(11).—4～6(E)0308408单片机在高射速航炮余弹计数器中的应用[刊]/付兴振//测控技术.—2002,21(增刊).—164～165(E)主要介绍了高射速航炮余弹计数器的设计方法.给出了硬件电路和软件设计流程。

关键词： 压铸机   多处理器控制系统   德国富来公司   自动化  

摘要： 目前，压铸机制造行业也和其他行业一样面临着日益增长的全球范围内的产品竞争的压力，因此如何提供给用户更经济、更实用、更有效的机器是压铸机制造厂商要解决的一个重要的课题。

关键词： PMC-Sierra公司   RMM9000系列   MIPS   64位多处理器  

关键词： 多处理器   共享内存机制   CPU   CompactPCI总线   地址映射机制   消息通信   Internet  

摘要： 基于总线的分布式多处理器体系结构是目前常见的高性能路由器硬件体系结构 .清华大学计算机系在研制“86 3”重大项目“高性能安全路由器”的过程中 ,在基于 Compact PCI总线的 Power PC多处理器平台上实现了一种多处理器共享内存机制 .该共享内存机制 (SM机制 )实现了一系列核心对象 ,包括 SM内存、SM信号量、SM消息队列和SM任务控制块等 .本文详细介绍了

关键词： brain atlas   contrast-enhanced MR mammography   high-performance computing   intersubject registration   iutraoperative brain deformation   motion correction   multithreaded computations   nonrigid image registration   parallel performance  

摘要： One major problem with nonrigid image registration techniques is their,high computational cost. Because of this, these methods have found limited application to clinical situations where fast execution is required, e.g., intraoperative imaging. This, paper presents a parallel implementation of a nonrigid image registration algorithm. It takes advantage of shared-memory multiprocessor computer architectures using multithreaded programming by partitioning of data and partitioning of tasks, depending on the computational subproblem. For three different biomedical applications (intraoperative brain deformation, contrast-enhanced MR mammography, intersubject brain registration), the scaling behavior of the algorithm is quantitatively analyzed. The method is demonstrated to perform the computation of intra-operative brain deformation in less than a minute using 64 CPUs on a 128-CPU shared-memory supercomputer (SGI Origin 3800). It is shown that its serial component is,no more than 2% of the total computation time, allowing a speedup of at least a factor of 50. In most cases, the theoretical limit of the speedup is substantially higher (up to: 132-fold in the application examples presented in this paper). The parallel implementation of our algorithm is, therefore, capable of solving nonrigid registration problems with short execution time requirements and may be considered an important step in the application of such techniques to clinically important problems such as the computation of brain deformation during cranial image-guided surgery.

关键词： ADSP21160   处理器   并行系统   静态随机存取存储器   先入先出   数字信号处理器  

摘要： 首先介绍ADSP21160的功能及其特征,详细给出基于ADSP21160的多处理器并行系统的设计流程及外围电路。最后介绍该并行系统的应用。

关键词： PDD算法   对称多处理器   并行计算   并行算法   消息传递   MPI编程   并行加速比   集群式高性能计算机  

摘要： 使用基于MPI并行编程方法,对PDD算法进行了并行处理及fortran编程,给出了并行代码在上海大学计算机学院自强2000集群式高性能计算机上的运行结果,以及与串行程序相比较的并行加速比。

摘要： The perfoffnance of a multiprocessor greatly depends on the effectiveness of its interprocessor communication. Shared memory and message passing are two major communication architectures for multiprocessors. In shared memory systems, processors communicate by writing to and reading from a coIimon memory. In message passing architectures, nodes communicate by passing messages through an interconnection network using send and receive commands. Both systems have their advantages and disadvantages. This study aims to explore the feasibility of using multiport memories for interprocessor communication based on message passing. The individual ports of a multiporl memory provide independent access to memory cells and can be used as communication links. In the communication structure proposed in this study, several nodes connected to a multiport memory can communicate in parallel without the overhead and delay of the bus architecture, or the interconnection network of a typical shared memory system. The small number of ports on multiport memory is a limiting factor that restricts the number of nodes connected to this structure. The proposed structure can be scaled by using a hierarchy in which the nodes that are not connected directly can communicate through network controllers and other available multiport memories. In this structure, shared memory is used as a link for message passing. In contrast to other shared memory systems, the small shared memory in this structure is exclusively used for communication purpose. The first stage in evaluating the proposed structure was the design and implementation of a small multiprocessor called MultiCom. In this prototype system, four nodes were interconnected by a 4-port memory. The memory management of MultiCom could prevent the nodes from interfering with each other using static and dynamic allocations. In particular, dynamic allocation used fewer but larger buffers that could be assigned to any communication on demand, and full

关键词： 因特尔   AMD公司   CPU   超线程   多处理器