关键词： 数字信号处理器   多处理器   并行处理   共享总线  

摘要： 本文结合一种由九片 TMS320C25和 PC 机构成的实时信号处理系统,着重讨论了单片数字信号处理器(DSP)用于实时信号处理的并行多处理器系统,并给出了4096象素点5×7距离-频率单元平均恒虚警率(CFAR)检测的时间。

关键词： Electrical Engineering and Computer Science  

摘要： Optical communication links have great potential to improve the performance of interconnec- tion networks within large parallel multiprocessors, but the problems of semiconductor laser drive control and reliability inhibit their wide use. These problems have been solved in the telecommunications context, but the telecommunications solutions, based on a small number of links, are often too bulky, complex, power-hungry, and expensive to be feasible for use in a multiprocessor network with thousands of optical links. The main problems with the telecommunications approaches are that they are, by definition, designed for long-distance communication and therefore deal with communications links in isolation, instead of in an overall systems context. By taking a system-level approach to solving the laser reliability problem in a multiprocessor, and by exploiting the short-distance nature of the links, one can achieve small, simple, low-power, and inexpensive solutions, practical for implementation in the thousands of optical links that might be used in a multiprocessor. Through modeling and experimentation, I demonstrate that such system-level solutions exist, and are feasible for use in a multiprocessor network. I divide semiconductor laser reliability problems into two classes: transient errors and hard failures, and develop solutions to each type of problem in the context of a large multiprocessor. I find that for transient errors, the computer system would require a very low bit-error-rate (BER), such as 10-23, if no provision were made for error control. Optical links cannot achieve such rates directly, but I find that a much more reasonable link-level BER (such as 10 - 7 ) would be acceptable with simple error detection coding. I then propose a feedback system that will enable lasers to achieve these error levels even when laser threshold current varies. Instead of telecommunications techniques, which require laser output power monitors, I describe a software-based fe

摘要： The memory consistency model (or memory model) of a shared-memory multiprocessor system influences both the performance and the programmability of thesystem. The simplest and most intuitive model for program- mers, sequential consistency, restricts the use of many performance-enhancing optimizationsexploited byunipro- cessors. For higher performance, severalalternativemodels have been proposed. However, many ofthese are hardware-centric in nature and difficult to program. Further, the multitude of many seemingly unrelated memory modelsinhibits portability. We usea3P criteria of programmability, portability, and performance to assess memory models, and find current models lacking in one or moreof these criteria. This thesis establishes a unify- ing framework for reasoning about memory models that leads to models that adequately satisfy the 3P criteria. The first contribution of this thesis isa programmer-centric methodology, called sequential consistency nor- mal form (SCNF), for specifying memory models. This methodology is based on theobservation that perfor- mance enhancing optimizationscan be allowed without violating sequential consistency if the system is given some information about the program. AnSCNF model is a contract between the system and the programmer, where the system guarantees both high performance and sequential consistency only if the programmerprovides certain information about the program. Insufficient information gives lower performance, but incorrect informa- tion violates sequential consistency. This methodology adequately satisfies the 3P criteriaof programmability (by providing sequential consistency), portability (by providing a common interface of sequential consistency across allmodels), and performance (by only requiringthe appearance of sequential consistency for correct programs). The second contribution demonstrates the effectiveness of the SCNF approach by applying it to the optimi- zations of several previous hardware-centric model

关键词： 情报系统   定义   HIPPI   接口   数据处理设备   物理层  

标准号: ANSI X3.222-1993

关键词： QA76.6P2O8   Computer programming.  

摘要： We propose a framework for the evaluation of implicitly parallel functional programs on message passing multiprocessors with special emphasis on the issue of load bounding. The model is based on a new encoding of the lambda-calculus in Milner's pi-calculus and combines lazy evaluation and eager (parallel) evaluation in the same framework. The pi-calculus encoding serves as the specification of a more concrete compilation scheme mapping a simple functional language into a message passing, parallel program. We show how and under which conditions we can guarantee successful load bounding based on this compilation scheme. Finally we discuss the architectural requirements for a machine to support our model efficiently and we present a simple RISC-style processor architecture which meets those criteria.

关键词： 数据处理   情报系统   协议   数据传送   HIPPI   定义   界面   接口  

标准号: ANSI X3.218-1993

摘要： This standard provides a common method for encapsulating ISO 8802-2 (IEEE 802.2) Logical Lin Control Protocol Data Units (PDU) on HIPPI

关键词： STD总线   处理器   单片机  

关键词： 并行处理   计算机系统   软件  

摘要： Task scheduling is one of the most important issues in a hard real-time system, because it is the schedule that ensures tasks meet their deadlines and precedence constraints. Given a set of hard real-time tasks, to determine whether a feasible schedule exists such that the timing constraints and precedence constraints of the tasks are satisfied, and to produce such a schedule if one exists are the purposed of a static scheduler. The previous work done for the static scheduler in the computer aided prototyping system (CAPS) was mainly for the single processor environment. The major work of this thesis is to develop several algorithms for scheduling hard-real-time tasks on multiprocessor systems so that the associated timing and precedence constraints, as well as the communication requirements are met under the worst-case scenario.

关键词： 多处理器   计算机系统   硬件   并行