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关键词： Threshold voltage   Hysteresis   Radiation effects   Silicon carbide   MOSFET   Logic gates   Annealing   Oxide trapped charges   silicon carbide (SiC) MOSFET   threshold voltage hysteresis   total ionizing dose (TID) effect  

摘要： This work investigates the effects of total ionizing dose (TID) irradiation bias, temperature, dose, and post-irradiation annealing on the threshold voltage hysteresis of silicon carbide (SiC) MOSFETs. The research reveals that the TID effect decreases the threshold voltage hysteresis, which is proportional to the accumulation of radiation-induced charges in the gate oxide. The reduction in threshold voltage hysteresis is unrelated to the change of the interface-trapped charges. However, it is mainly caused by the reduction of the nonequilibrium interface trapped charge energy range (Delta E-VTH). The radiation-induced charges can exacerbate the hole emission process of the donor interface traps during the up-sweep process, which causes an upward shift of the lower boundary of Delta E-VTH . The slight shift of the Fermi energy level during the down-sweep process leads to no significant change in the upper boundary of Delta E-VTH . Eventually, the TID effect causes a reduction in the threshold voltage hysteresis. The changes in the occupation probability of the donor and acceptor interface traps during the scanning of the I-DS-V(GS )curves were extracted by TCAD simulation. The results showed that the inconsistent changes in the occupation probability of the donor interface traps in the up-sweep and down-sweep curves cause a reduction of the threshold voltage hysteresis. The analysis was further verified using different voltage sweep ranges in the experiment.

关键词： Temperature sensors   Temperature measurement   Transistors   Oscillators   Tunneling   Energy efficiency   Logic gates   MOSFET   Temperature dependence   Junctions   Band-to-band tunneling (BTBT)   oscillator   SOI   TCAD mixed mode simulation   temperature sensor  

摘要： The compact and energy-efficient integrated temperature sensors are crucial for temperature monitoring and control. In this work, we propose a novel area and energy-efficient band-to-band tunneling (BTBT)-based oscillator for temperature sensing applications. It utilizes oscillation frequency as a metric for temperature sensing. The linearity in BTBT current with temperature can enable sensing with a simple readout mechanism. The initially designed circuit is simulated and analyzed in TCAD using mixed-mode simulation, followed by the fabrication of the proposed circuit using GF 45nm RFSOI technology. Measurements show the BTBT oscillator's quasi-linear response as a function of temperature. Our proposed work enables the area (0.32 mu m(2)) and energy-efficient temperature sensor (2.5 fJ/cycle) for the energy and area-constraint edge applications.

关键词： Logic gates   Stress   MOSFET   HEMTs   Electron traps   Transient analysis   Epitaxial growth   OFF-state stress   reliability   stability   trapping   trench MOSFET   vertical GaN  

摘要： We analyzed the threshold-voltage dynamic instabilities induced by off-state stress in pseudo-vertical GaN-on-Si Trench mosfets (TMOS). Extensive measurements revealed that off-state stress experiments induce a progressive increase of threshold voltage (V-T), that is fully recoverable only after high-temperature cycles, so that it can appear as permanent degradation at room temperature. V-T increase is found to be strongly affected by drain bias and negligibly influenced by gate bias (below threshold). Activation energy (E-A) extracted from high-temperature V-T recovery experiments was determined to be approximate to 1 eV. We further characterized pseudo-vertical p-n junction diodes fabricated onto the same wafer as the TMOS's by means of capacitance isothermal spectroscopy. This experiment revealed depletion capacitance (C-DEP) instabilities with the same E-A as that characterizing the V-T instability, leading to the conclusion that trap states present in the epitaxy are the cause of both observations. Numerical device simulations guided the physical interpretation of the observed phenomena, i.e., donor traps at 1 eV from the conduction band and localized in the p-layer lead to both V-T and C-DEP instabilities in the TMOS and in the p-n diode, respectively, by dynamically modulating the effective p-type doping density in the former and the effective depletion layer width in the latter.

关键词： Logic gates   Degradation   MOSFET   Switches   Stress   Silicon carbide   Leakage currents   Gate oxide degradation   leakage current   reliability   repetitive switching impulse (RSI)   silicon carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET)   trench gate  

摘要： The degradation behaviors and mechanism of commercial 1.2-kV rated SiC trench MOSFETs under repetitive switching impulses (RSIs) are comprehensively investigated. Two degradation regions and corresponding degradation behaviors are characterized. Region I is the gate oxide on the channel region. The electrons are trapped in region I under positive gate bias stress, which leads to a slightly positive shift of threshold voltage (V-th) and an increment in ON-state resistance (R (ds-ON) ). Region II is the gate oxide at the trench bottom corner. Hot holes are injected into the gate oxide of region II, which leads to a slight decrease in R ds-ON . The effect is intensified with the increase of thermal stress. Fortunately, the degradation of Region I is not affected by drain-source voltage (Vds) ds ) stress, even if V ds is up to 80% of the breakdown voltage (VBR). BR ). A severe gate leakage current was observed when it experienced 9.0 x 10(6) switching impulses under 80% x 0 V-BR . Simulated results confirm that the leakage current path is located at the trench bottom corner, induced by a strong electric field. This simultaneously explains the degradation observed in V (th) and R ds-ON .

关键词： silicon carbide (SiC)   silicon (Si)   Hybrid Power Switch   IGBT   MOSFET  

摘要： Hybrid Power Switches (HPS) combine the advantages of SiC unipolar and Si bipolar devices and therefore can bridge the gap between these technologies. In this paper, the performance of a hybrid power switch configuration based on the latest SiC MOSFET and Si IGBT technologies is presented. The device is evaluated through experimental measurements of its characteristics under various conditions. The results show the HPS can achieve switching losses as low as a SiC MOSFET while offering the high current capability of the IGBT without significant increase in costs.

关键词： MOSFET   Cryogenics   Temperature distribution   Silicon carbide   Logic gates   Temperature dependence   Switches   Capacitance   Ionization   Interface states   4H-SiC   cryogenic temperatures   JBS-integrated MOSFET  

摘要： In this article, a 1.2-kV conventional MOSFET and a MOSFET integrated with a junction barrier Schottky diode (JBSFET) were fabricated with a consistent process flow. The electrical characteristics of MOSFET and JBSFET, including static performance, structural capacitance, and switching performance have been systematically analyzed in the temperature range of 80-300 K. Experimental results show that the third quadrant voltage drop of JBSFET is smaller than MOSFET and hardly changes with decreasing temperature. The gate-drain capacitance of MOSFET and JBSFET increases by more than 50% at 80 K, due to the cryogenic incomplete ionization of the P-Base. The switching performance of the two devices is affected by the temperature dependence of threshold voltage, structural capacitance, and interface state charges, manifesting in a reduction in turn-on speed and voltage tailing at cryogenic temperatures. According to the results, JBSFET has better potential for low-temperature applications due to its stable third-quadrant characteristics. The cryogenic incomplete ionization of the P-Base region has a significant impact on the output characteristics, structural capacitance, and switching performance.

关键词： Detectors   Terahertz radiation   Transistors   Impedance   Terahertz communications   Semiconductor device modeling   MOSFET   CMOS process   Impedance measurement   Active imaging   Antenna-on-Chip (AoC)   complementary metal-oxide-semiconductor (CMOS)   different structures detectors   load effects   parasitic capacitance   port impedance matching   terahertz (THz) detector  

摘要： In this study, we designed a terahertz (THz) detector chip based on field-effect transistors utilizing a standard 55-nm complementary metal-oxide-semiconductor process. The chip includes eight different detector structures to explore the impact of various factors on detector performance. Each detector, characterized by its unique structural design, exhibited varying levels of parasitic capacitance, port impedance matching, and asymmetry, all impacting the detector's responsivity (R-v). Building on the previous nonquasi-static model, this research introduced a comprehensive THz detector model by incorporating plasma wave detection theory, antenna impedance, parasitic effects of the detector, port impedance, and load effects. We also derived the mathematical expression for R-v in the nonresonant mode. The multiple different structures detectors integrated with antenna-on-chip achieved the maximum R-v of 437.6V/W and the minimum noise-equivalent power (NEP) of 119 pW/Hz(1/2) at 2.58 THz. We then conducted scanning imaging on a paper envelope containing a screw. The appearance of the screw and the details of creases at various thicknesses on the envelope were clearly visible. Analysis indicated that the detector's R-v and NEP are closely linked to several factors, including the match between the antenna and the detector, the parasitic capacitance at the THz wave coupling site, the maximization of THz wave energy coupled to the detector, the appropriate size of the detector, and the asymmetry between the source and drain.

关键词： Logic gates   MOSFET   Charge carrier processes   Voltage measurement   Germanium   Tunneling   Transistors   Silicon   Modulation   Latches   Back-gate (BG)   band-to-band tunneling (BTBT)   electrical modulation   impact ionization (II)   single transistor latch (STL)  

摘要： A single transistor latch (STL), driven by impact ionization (II) and band-to-band tunneling (BTBT), plays a crucial role in threshold switching in a thin-body MOSFET. The inherent challenge lies in the high latch-up voltage (VLU) LU ) required to trigger the STL because the II and BTBT mechanisms rely on higher voltages. Moreover, thus far, strategies for adjusting the V LU level have been limited to altering process parameters or materials that are difficult to change once decided. Therefore, these methods do not provide dynamic controllability of VLU. LU . The high V LU and lack of tunability limit and hinder various applications utilizing STL. In this study, V LU was experimentally reduced to near 1 V by asymmetric biasing, i.e., electrically separating the top of the body (ToB) and the bottom of the body (BoB) through front-gate (FG) biasing and back-gate (BG) biasing. The underlying physics of this reduction was elucidated by means of TCAD simulation through the analysis of energy band diagrams, II rates, and BTBT rates. A significant reduction in V LU was achieved solely through electrical modulation.

关键词： Silicon carbide   MOSFET   Logic gates   Switches   Switching loss   Voltage control   Transient analysis   Active gate drive   self-regulation   SiC MOSFET   switching loss   voltage spike  

摘要： This paper presents a self-regulating active gate driver (AGD) for Silicon Carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET). The proposed AGD aims to reduce switching loss and voltage overshoot by incorporating an auxiliary driving branch. The circuit of the proposed AGD and its operation principles are analyzed based on the switching transition. Additionally, the time point selections for driving modes are optimized with a quasi-close-loop methodology to simplify the driving circuit and alleviate the computational burden on the controller. The signal for the auxiliary branch is optimized according to the sampled DC voltage and output current through an offline table. The proposed AGD is experimentally verified on a dual pulse test circuit and a full-bridge inverter. The proposed AGD can significantly reduce voltage spikes overshoot by 26.8%. Additionally, the switching loss can be decreased compared to the conventional gate driver.

关键词： Circuits   Voltage   MOSFET   Capacitors   Power demand   Transistors   Generators   Voltage reference   energy saving   gain-boosting  

摘要： This brief presents a voltage reference circuit to greatly save the energy through four new techniques. (1) It uses a simple common-source amplifier to replace the complicated gain-boosted amplifier. Through using an additional capacitor, this simple common-source amplifier achieves an effective gain which is even higher than a gain-boosted amplifier. (2) It obviates the need for a differential amplifier, since it uses a special negative feedback structure. (3) The extra biasing circuit is no longer needed for the summing amplifier, which helps simplify the circuit structure. (4) MOSFETs in the sub-threshold region are used, which leads to a lower supply voltage. In a 180nm CMOS process, it achieves a 15nW power consumption, a 500mV minimum supply voltage, a 26.2ppm/degrees C average temperature coefficient (TC), and a 330 mu V/V line sensitivity. It realizes a 16 times reduction in the power consumption, when compared with the prior work that is based on a gain boosted amplifier.