课程文献中心 更多>>

关键词： Transistors   Logic gates   Substrates   Capacitance   Performance evaluation   Electric fields   Doping   Silicon   Fabrication   Switching circuits   Junctionless (JL)   MOSFET   negative capacitance (NC)  

摘要： Through well-calibrated simulations, this work provides physical insights into the occurrence of dynamic sub-60 mV/decade switching in a negative capacitance (NC) junctionless (JL) transistor designed on a bulk substrate. Recognizing that the location of the conduction channel is a key factor governing the matching between ferroelectric and gate capacitances, we showcase the outperformance of bulk NCJL transistors compared to NCJL devices designed on a silicon-on-insulator (SOI) substrate. Results highlight that NCJL transistors designed with relatively higher bulk doping can achieve better dynamic S-swing along with a higher ON-to- OFF current ratio. We also investigate the short-channel performance comparison of bulk and SOI NCJL transistors. The results demonstrate the superiority of bulk NCJL transistors due to the enhanced NC effect resulting from the better ferroelectric and gate capacitances matching. The work provides a new viewpoint for designing of NCJL transistor on bulk substrate to facilitate steep S- swing at scaled gate lengths.

关键词： MOSFET   gate-stack   junctionless   NSFET   biosensor  

摘要： In this paper for the first time, we have studied various structures of nanosheet field-effect transistors (NSFET) and the effect of various devices and process parameters such as nanosheet width, length, interspacing, S/D doping, channel doping, random dopant fluctuations studied on these device structures. Comparative analysis has been done between JL-NSFET, GS-JL-NSFET, JL-SiGeNSFET and JL-GS-SiGeNSFET in terms of analog parameters. Nanosheet-based FETs are likely to be the successor of FinFET beyond the 5-nm node. NSFETs have better control over gate, variable sheet width and more current per device footprint which gives them the advantage of circuit design versatility. NSFET offers better gate control, better current and switching per device footprint. NSFETs are preferred over NWFETs due to better electrostatics, greater channel widths, decreased SCEs and increased device reliability.

关键词： Stress   Logic gates   Silicon carbide   MOSFET   Voltage measurement   Stress measurement   Switches   Bipolar switching stress   hysteresis effect   SiC MOSFET   test delay   threshold voltage shift  

摘要： In this letter, a novel method is proposed for accurately evaluating the transient recoverable threshold voltage (Vth) shift of silicon carbide (SiC) mosfet caused by hysteresis effect. Based on a resistive load circuit with the multistage gate drive module, the method achieves a fast switching from high-frequency bipolar switching gate bias stress to V-th acquisition. Furthermore, the method is experimentally verified with a 1200-V commercial SiC mosfet. The Vth shift is evaluated after bipolar switching stress, and the time interval between stress and measurement, i.e., the test delay, is reduced to 100 ns. In addition, the V-th shift with different test delays after 500-kHz bipolar stress is evaluated. The results demonstrate that the positive and negative V-th shifts measured after a delay time of 1 mu s can be underestimated by more than 32% and 22%, respectively, when compared to a shorter test delay of 100 ns.

关键词： Inverters   Leakage currents   MOSFET   Reactive power   Inductors   Voltage   Transformers   Common-ground   dual buck   inverter  

摘要： This article presents two unique common-ground high-reliability dual-buck single-phase inverters suitable for photovoltaic applications. The proposed inverters directly connect the source and load, excluding the inverters from leakage current. The first proposed inverter works only for unity power factor operation. In its operation, the inverter employs only one high-frequency switching device, thus presenting low switching losses and improving overall efficiency. The second proposed inverter works for any power factor. In its operation, the inverter utilizes two high-frequency switching devices, resulting in minimal switching losses. The proposed inverters have no reverse recovery loss and related issues since the body diodes of the power metal-oxide-semiconductor field-effect transistors are disabled. The proposed inverters are devoid of short-circuit issues, resulting in high reliability. The detailed modes and operating principles together with the pulsewidth-modulated strategy for the proposed inverters are described. Experiments were carried out on 0.6-kW laboratory prototypes, operating at a switching frequency of 50 kHz and an output voltage of 110 V-rms. The experimental results verified the robustness of the proposed inverters.

关键词： Semiconductor device modeling   MOSFET   Silicon carbide   JFETs   Accuracy   Logic gates   Electric potential   Body diode   gallium nitride (GaN)   modeling   power MOSFET   silicon carbide (SiC)   spice   wide band gap semiconductors  

摘要： This article introduces a novel quasi-floating channel model for accurately simulating the third quadrant behavior of silicon carbide (SiC) mosfets. The proposed model, developed to overcome the shortcomings in existing models, especially under the negative V-GS bias, substantially improves the simulation accuracy of the I-V characteristics. The efficacy of the model is demonstrated through extensive comparisons with commercial devices of various structures. The experimental validations highlight the superiority of the proposed model, demonstrating a maximal 95.6% improvement in root-mean-square error (RMSE) compared to conventional models, along with a maximal 87.5% enhancement in the total calculation time. Furthermore, for the extreme cases, this article also evaluates the proposed model with gallium nitride (GaN) high-electron-mobility transistor (HEMT), which is a fully floating channel structure as a comparison and the proposed model also demonstrates high accuracy and feasibility with a maximal 94.5% reduction in RMSE. This article provides an accurate and reliable model for predicting device behavior for various SiC devices.

关键词： Silicon carbide   Logic gates   Voltage measurement   Standards   Energy measurement   Density measurement   Threshold voltage   Interface states   Semiconductor process modeling   Semiconductor device measurement   Double trench (DT) silicon-carbide metal-oxide semiconductor field-effect transistor (SiC MOSFET)   interface trap   oxide trap   threshold voltage degradation   total ionizing dose (TID)   trap energy level  

摘要： Threshold voltage ( V-TH ) degradation mechanisms induced by the ionizing irradiation for the 1200-V double-trench (DT) silicon-carbide (SiC) metal-oxide semiconductor field-effect transistor (MOSFET) are investigated. The ionizing irradiation experiment is performed with different gate-source voltages ( V-GS ) and total ionizing doses (TIDs). The maximum V-TH shifts are -1.92 V for a V-GS of 0 V and a TID of 500 krad(Si), and -4.73 V for a V-GS of 20 V and a TID of 150 krad(Si), respectively. A novel method of investigation on TID-induced V-TH shift from energy domain and numerical simulation with the aid of the TCAD tool is exploited. Extensive simulations indicate that donor-like oxide traps with energy larger than 0.55 eV dominate the negative V-TH shift. The summation of two Gaussian distribution models is used to emulate trapped hole energy distribution, and the relative errors between measured and simulated V-TH shifts are within +/- 13.36% at a TID of 100 krad(Si).

关键词： MOSFET circuits   Stress   MOSFET   Transistors   SRAM cells   Degradation   Fluctuations   Hot carrier degradation (HCD)   lightly doped drain (LDD)   MOSFETs   quasi-ballistic transport   static random access memory (SRAM)   variability  

摘要： In this work, the impact of lightly doped drain (LDD) implantation doses on hot carrier degradation (HCD) variability behaviors has been studied for transistors and static random access memory (SRAM) cells. It is found that threshold voltage (V-T) variability is enhanced, while the saturation current (I-D) variability is suppressed for n-type MOSFETs (n-MOSFETs) and p-type MOSFETs (p-MOSFETs) during HCD. Nonuniform trap generation and the current self-convergence mechanism are used to explain the reason for variability, respectively. Devices fabricated at higher LDD doses have lower variability, which is attributed to improved quasi-ballistic transport characteristics. Furthermore, the impacts of HCD on the static noise margin (SNM) variability of SRAM cells in the hold and read state are also inhibited with the increased LDD doses due to the descending variability in individual transistors. Therefore, LDD process optimization is beneficial for transistors and circuits against HCD variability without additional design margin.

关键词： Switches   Switching circuits   Insulated gate bipolar transistors   MOSFET   Silicon carbide   Switching loss   Reliability   Current interval   driving voltage   hybrid switch   switching sequence   switching strategy  

摘要： Silicon/Silicon carbide hybrid switch have been proven to have the advantages of high efficiency and low cost. However, existing research of hybrid switches only focuses on reducing device losses or ensuring reliable operation. In this article, a novel switching strategy based on the driving voltage and switching sequence for the hybrid switch is proposed. Experimental results show that compared with the existing switching strategy of the fixed driving voltage, the proposed switching strategy cannot only ensure a high reliability of the hybrid switch, but also improve the efficiency. Then, the effectiveness of the proposed switching strategy is verified in a single-phase inverter. Further, the efficiency of the single-phase inverter operating with the proposed switching strategy is increased by 0.79% compared with the existing switching strategy.

关键词： Logic gates   Temperature measurement   Silicon carbide   MOSFET   Junctions   RLC circuits   Temperature sensors   Junction temperature extraction   reliability   SiC MOSFET  

摘要： Real-time measurement of junction temperature is critical for high reliability operation of power devices. The process of SiC MOSFETs turn-on is very short. The rising edge of the peak gate current may be less than 10ns, and the existing peak gate current measuring circuit cannot match the high-frequency characteristic of SiC MOSFETs. This paper presents a precise and fast circuit to estimate the junction temperature of SiC MOSFETs, which adds a current riser and the rectifier diode is replaced by a matching high-speed triode. The designed circuit can determine the peak gate current in real-time, regardless of the converter's actual operation, and eliminate the need for supplemental control signals. Empirical evaluation is conducted using double-pulse tests, demonstrating that the SiC MOSFET's peak gate current, exhibits a linear relationship with the junction temperature, with a sensitivity of approximately -0.107 mA/degrees C. The circuit's temperature estimation accuracy is further corroborated with an IR (infrared radiation) camera. Additional validation is provided by the Boost converter, confirming the circuit's functionality even without interference from the converter's main circuit.

关键词： 核电   数字孪生   变压器   数字化模型  

摘要： 针对现有核电厂变压器设备智能化程度低，设备运维仍以人工巡检、定期维护为主，缺乏对设备状态进行实时预测评估手段的现状，本文将针对核电厂主变压器给出一种快速耦合场计算方法，基于该方法结合变压器状态实时监测和变压器结构的数字化模型组建核电行业主变压器的智能数字孪生模型，实现了对实体变压器多维度、全过程、全景式的状态监测和展示。这意味着我们可以实时监测主变压器在不同运行工况下，结构内部的具体运行参数。如发现潜在问题，并及时采取相应的维修措施，从而避免设备故障对核电厂运行的不利影响。