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关键词： 非线性   卷积神经网络   长短期记忆网络   磁场   加速计算  

摘要： 快速获得变压器空间磁场动态分布是构建变压器数字孪生体的基础之一，然而现有快速计算方法难以快速、准确地获得铁心饱和工况下的磁场分布特性。因此，该文提出了计及铁心非线性的变压器空间动态磁场加速计算方法。首先，构建变压器电磁场路耦合仿真模型，对关键变量进行参数化扫描，仿真获得不同非线性工况下的大量磁场数据，构建涉及铁心非线性工况的主磁通和漏磁通数据集；其次，提出融合卷积神经网络（CNN）和长短期记忆网络（LSTM）的双分支深度学习模型，训练提取磁场数据的空间和时间特征，解决主、漏磁通差异大造成的模型训练难题；最后，利用模型获得输入电压、电流与内部空间磁场分布的非线性映射关系，实现空间动态磁场的加速计算，为变压器数字孪生体的构建提供了快速获得磁场数据的方法。

关键词： 激光渗氮   TA1   DM码   表面技术   摩擦学性能  

摘要： 针对工业纯钛合金（TA1）表面溯源防伪DM(Data matrix)码易磨损的问题，在密闭氮气环境下，采用低功率激光渗氮工艺在TA1表面制备涂层实现表面强化。探究了激光功率对TA1氮化层微观组织、显微硬度及摩擦磨损性能的影响，研究结果表明：氮化层主要由TiN相构成，还存在少量的α-Ti相和β-Ti相，这表明该工艺在TA1表面有效实现了激光渗氮，且当激光功率为16 W、扫描间距为0.03 mm、频率为40 Hz、扫描速度为25 mm/s、补偿因子为0.04 mm时，与基体相比，氮化层表面显微硬度提升至原来的1.7倍，磨损体积减小了98%，磨痕宽度与深度分别减小了83%和82%。此外，在最优激光氮化参数下分别在大气环境与氮气环境中利用激光标刻DM码，通过摩擦实验对DM码进行耐磨性评估，结果表明：经过激光氮化的DM码与大气环境中标刻的DM码相比，平均摩擦系数减小了44.4%，磨痕宽度减小了55%，对比度增大了25%，并且氮气环境中制得的DM码识读等级为A级，而大气环境中为C级，表明激光氮化标刻工艺在保证DM码识读等级的基础上极大提高了DM码的硬度与耐磨性能。

关键词： Insulated gate bipolar transistors (IGBT)  

摘要： A novel SOI-LIGBT integrating a Double Selfdriving MOSFET (DSM) is proposed. The DSM consists of a Self-Biased P-MOS (SBP) with a shorted main gate and a Self-Biased N-MOS (SBN) with a shorted auxiliary gate. These components are designed to function without additional gate signals, and they are driven automatically by the operating state of the LIGBT. During forward conduction, the SBP (VGS,P > Vthp) is turned off, whereas the SBN gradually turns on as the VCE increases. The P-buried substrate of SBN creates a potential barrier for electron carriers, effectively eliminating the snapback effect. During reverse conduction, the SBP (VGS,P Vthn) are reactivated to extract excess carriers. Consequently, the DSM-LIGBT achieves a superior tradeoff between VON and EOFF. At VON = 1.22 V, the EOFF is reduced by 30%, 30.32%, and 68.23% compared with SBM-LIGBT, TBSA-LIGBT, and SSA-LIGBT, respectively. © 2025 IEEE.

关键词： Semiconductor device modeling   Integrated circuit modeling   Mathematical models   MOSFET   Silicon carbide   Capacitance   Temperature   Numerical models   SPICE   Junctions   SPICE model   continuous function   parasitic parameters   temperature-dependent   SiC trench MOSFET  

摘要： The application of silicon carbide (SiC) MOSFETs in the field of high voltage and high frequency brings the major challenge of high switching loss. To give full advantage of its performance in high-frequency applications and provide a simulation analysis method for the analysis and design of power electronic systems, it is essential to establish simulation models of the SiC power MOSFET switching behavior suitable for different ambient temperatures. A temperature-dependent compact SPICE model considering parasitic parameters is proposed in this article, which uses only the parameters in the datasheet or provided by manufacturers. The main technology-dependent parameters are analyzed and discussed in detail, including the nonlinear parasitic capacitance, parasitic parameters of the power module, and static characteristic parameters. In static characteristics, a simple and continuous equation is used to describe the drain-source current of the SiC power MOSFET. The static characteristic parameters of the SPICE model were compared with the 1.2-kV SiC power MOSFET, manufactured by ROHM, Inc., (SCT3030KLHR). Subsequently, the dynamic characteristic is verified by comparing the simulation results with experimental results in a double pulse circuit employing the half-bridge module under different temperatures. Comparisons between the datasheet and experiments demonstrate the precision of the modeling methodology and the consistency of the results.

关键词： 高中物理   理想变压器   动态分析  

摘要： 本文围绕理想变压器的动态分析展开深入探讨.首先通过具体实例详细分析负载变化和原副线圈匝数比变化等情况下,变压器各物理量的动态变化规律.进一步探讨动态电路的解题方法.旨在帮助读者深化对理想变压器动态分析的理解,提高解决相关问题的能力.

关键词： Voltage   Inverters   MOSFET   DC-DC power converters   Mechanical power transmission   Silicon carbide   Numerical models   Finite element analysis   Analytical models   Mathematical models   Electric vehicles   SiC-based motor drives   voltage-source inverters   dc-dc boost converter   permanent magnet synchronous machine   energy efficiency  

摘要： This paper seeks to identify an optimal DC-link voltage across the complete range of drive operating conditions utilizing a loss minimization approach by integrating a DC-DC converter into the powertrain, thereby enhancing powertrain efficiency. This involves a comprehensive analysis of power losses in a connected silicon carbide (SiC)-based converter-inverter system, incorporating temperature variations, alongside a finite element method (FEM) analysis of losses in an Interior Permanent Magnet (IPM) synchronous machine, accounting for variable DC-link voltages. The results are then compared with those of traditional silicon-insulated-gate bipolar transistor (Si-IGBT) systems. The findings reveal that including a DC-DC converter into a powertrain, and adjusting the optimum DC-link voltages, is advantageous, particularly for low battery terminal voltages. Consequently, the powertrain system, incorporating a DC-DC boost converter, exhibits lower total loss values, with a difference of up to 5 kW loss difference for high-speed, low-torque regions compared to the case when not incorporating the DC-DC converter. Furthermore, applying the proposed optimal DC-link profile in the Worldwide harmonized Light vehicle Test Cycle (WLTC) leads to a reduction of up to 16% in accumulated energy losses in the SiC driveline compared to its IGBT counterpart. In addition, applying the optimal DC-link profile reduces energy losses by 58% in the SiC-based system and by 54% in the IGBT-based system, compared to operating with a fixed 300 V DC-bus voltage.

关键词： Photonics   Logic gates   MOSFET   Dielectrics   Tunneling   Stress   Aluminum oxide   Hafnium oxide   Electron traps   Electric fields   Ga2O3   E-mode   CTL  

摘要： A charge trapping layer (CTL) technique is incorporated to achieve a normally-off Ga2O3 MOSFET. The gate dielectric was engineered using a stack composed of a blocking layer (16 nm HfOx / 2 nm Al2O3), a CTL (5.76 nm Al:HfOx 1:5), and a tunneling barrier (2 nm Al2O3 / 2 nm HfOx / 2 nm Al2O3). The trap profile of the CTL layer and the interface of the gate dielectric and Ga2O3 channel are studied by photon-stimulated characterization, which yield highly uniform results, indicating the high quality and uniformity of the proposed method. Furthermore, we conducted a time-dependent dielectric breakdown (TDDB) test on devices both without a field plate (NOFP) and with a source-connected field plate (SFP) to investigate the dielectric failure mechanism and gain valuable insights for the design of CTL-based Ga2O3 MOSFETs.

关键词： Multivalued logic   Logic gates   MOSFET   Symbols   Artificial intelligence   Threshold voltage   Power demand   Partial discharges   Layout   Inverters   Multi-valued logic   ternary logic   full-adder   depletion-mode MOSFET   layout  

摘要： The application of artificial intelligence (AI) requires advanced computation to address complex problems. However, the improvement of binary computing systems supporting these applications is approaching their limits due to atomic-level scaling. Regarding this challenging situation, ternary computing is gaining more attention due to its better data saving/computing/moving capability. Thus, ternary logic based on various devices was proposed, but these circuits are still encountering issues of high-power consumption, low operating speed, and challenges in manufacturing compared to silicon-based circuits. Therefore, this paper presents a methodology for designing ternary logic based on Depletion-mode metal-oxide-semiconductor field-effect transistor (DEPFET) and multi-threshold voltage complementary metal-oxide-semiconductor (MTCMOS). Our silicon-based devices are easier to manufacture and support high-speed/low-power operations through our complementary ternary logic. Our balanced ternary full adder (BTFA) is $9.70\times $ better energy efficiency than the latestcarbon nanotube field-effect transistor (CNTFET) based BTFA. We also propose the first methodology to design a ternary cell layout in multi-height standard cell design. We propose an algorithm for the best ternary cell layout and a concept of integrated layout that reduces area when required cells are close to each other.

摘要： 随着5G的逐步商用和6G技术的加速研究，人工智能、无人驾驶等领域对无线技术具有更高的需求。射频滤波器作为无线系统射频前端的重要组成器件，各行各业的无线应用对射频滤波器具有大量需求，同时对其高频率、大带宽、低损耗、高选择性等性能指标提出了更高要求。深入研究关于射频滤波器的新材料、新工艺和新设计技术具有重要的科学意义和应用价值。

关键词： 风电场数据特征   功率预测   PT二次回路   灰狼寻优算法   门控循环单元  

摘要： 由于风力具有不确定性，导致风电波动性较强。为了对风电功率进行准确的预测，建立基于数据特征的功率预测系统。根据风电场数据特征对数值天气预报(NWP)风速数据进行修正，对异常风电数据进行滤波和补齐处理，并对风电机组进行实时监测，实现风电场经济性运行。风电场电能采集模块完成对风电场龙风线、主变线路高压侧、变压器等信息的采集。采用电压互感器(PT)二次回路压降的方法提高测量精度。利用拉丁超立方抽样策略(LHS)对灰狼寻优算法进行改进，保证种群初始参数抽样过程的稳定性，建立基于门控循环单元网络的功率预测系统，实现对风电功率的预测。实验结果显示，风电功率预测系统的训练时间仅为845 s,平均预测误差低于5%,预测精度最大。