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关键词： Electromagnetic interference   Filters   Switches   Noise   Inductors   Silicon carbide   MOSFET   Inductance   Capacitors   Voltage   Conducted electromagnetic emission   dc-dc converter   electromagnetic emission   high-frequency conducted electromagnetic interference (EMI)   low-frequency conducted EMI   SiC-MOSFET  

摘要： This article presents a novel and efficient inductor-diode-based technique to mitigate the high-frequency conducted electromagnetic interference (EMI) noise, which has not been reported in the literature so far. It targets the high-frequency conducted EMI peaks that fall in the frequency range, 2MHz - 30MHz, by distributing the high-frequency noise peak energy into several frequencies. Thus, it restricts the high-frequency oscillation generated due to the switching transients of the converter. In the proposed technology, a parallel combination of inductor and diode is connected in series with the dc-link capacitor of the converter. The inductance value is inversely proportional to the di/dt of the converter switch and remains below 100 nH. The power dissipated in the diode is around 0.05% of the converter power rating, and its blocking voltage is less than 5% of the dc-link voltage. Thus, the inductor and diode are smaller in size and cheaper in cost. The proposed technology has been experimentally validated on a SiC-mosfet based 1kW dc-dc converter. The input voltage and current for the converter are 200V and 5A, respectively. The proposed technique achieves 16dB reduction of the noise peak at 26MHz.

关键词： Crosstalk   Logic gates   Silicon carbide   MOSFET   Driver circuits   Transient analysis   Circuits   Switches   Transistors   Switching circuits   Crosstalk suppression   fast switching transient   gate-source driver circuit   parasitic parameters   SiC MOSFET  

摘要： Power converters composed of SiC mosfets with fast switching transients are widely used in high-performance, high-power applications. Wide bandgap semiconductor devices with high switching frequencies in the driver circuits are highly susceptible to the gate-source crosstalk voltages during fast switching transients, which can lead to mis-conductance and shoot through phenomena in complementary bridge arms. In this article, an improved crosstalk suppression gate-source driver topology based on transistors and passive components is proposed to effectively suppress the crosstalk issues of the voltage source inverters. It does so without compromising the performance of SiC power devices by strategically putting the auxiliary circuits into or removing them out of the gate-source driver circuits as necessary, ensuring the normal operation is maintained. Additionally, the auxiliary transistors can flexibly adjust their operating modes according to the crosstalk patterns in the gate-source driver circuits without the need for extra control signals or external excitation. The improved driver circuit uses transistors and passive components for crosstalk suppression, which enhances the reliability of the drive system to a certain extent. Finally, the feasibility and effectiveness of the improved crosstalk suppression driver topology are verified by simulations and experiments.

关键词： 模态分析   频率响应   动力特性  

摘要： 网架结构在现代建筑工程中广泛应用,其动力特性对结构的安全性和稳定性至关重要,动力特性分析的主要目的是评估网架结构在提升和卸载过程中的振动特性和频率响应,确保结构在施工过程中的安全性和稳定性;通过模态分析识别网架结构的固有频率和对应的振型,确定结构在不同模态下的动力特性;其次分析网架结构在不同工况下的频率响应,识别可能的共振频率范围,评估结构在动态荷载作用下的响应特性,确定结构的关键振动模态,评估其在施工过程中的影响,从而验证网架结构施工方案的安全性。

关键词： SiC   MOSFET   Charge pumping   Vth shift   Interface  

摘要： This work focuses on the extraction of Threshold Voltage Shift due to interface trapping from Charge Pumping (CP) measured curves. The proposed mathematical approach analyzes the peak of the charge pumping curve, proportional to the average interface defects density, for estimating the threshold voltage shift due to interface trapping separately from the shift induced by oxide trapping. The high-frequency nature of CP measurements is therefore exploited for the detection of fast states. The analyzed devices are 4H-SiC n-channel MOSFETs and a custom, on-wafer, in-situ measurement setup is used. Under constant current gate stress, positive and negative charge trapping processes are identified;the role of a) charge trapping in the oxide and b) interface states generation is analyzed and described.

关键词： Logic gates   Switches   Three-dimensional displays   HEMTs   Integrated circuit interconnections   JFETs   Control systems   Voltage control   Silicon carbide   MOSFET   SiC JFET   GaN HEMT   3-D package   switching speed  

摘要： To unlock the full fast-switching potential of the GaN-HEMT/SiC-JFET cascode device, parasitic interconnection inductances are minimized with a 3-D stacked co-packaging configuration. This configuration offers the benefits of reduced switching loss and suppressed oscillation. Equipped with the 3-D co-package configuration, the dv/dt control capability of the GaN/SiC cascode device is enhanced by introducing an additional gate-drain capacitor, CGD-LV, to the low-voltage GaN HEMT. This additional CGD-LV improves the coupling between the input control gate voltage and the JFET's gate voltage, which ultimately determines the switching speed of the GaN/SiC cascode device. Experimental results verified the GaN/SiC cascode device, when equipped with the 3-D co-packaged configuration and the additional CGD-LV, demonstrated fast switching capability with adequate dv/dt control.

关键词： Transistors   Logic gates   Voltage measurement   Semiconductor device modeling   HEMTs   Gallium nitride   Capacitance   Silicon   MOSFET   Switching circuits   Gallium nitride (GaN) devices   hybrid-drain-embedded gate injection transistor (HD-GIT)   behavioral model  

摘要： Gallium Nitride (GaN) high-electron-mobility transistors (HEMTs), with their superior on-resistance and switching times, provide a promising alternative to Silicon (Si) and SiC devices. Commercially available normally offGaN transistors can be categorized into two main groups: hybrid transistors, which incorporate a Si mosfet, and e-mode transistors. The latter are the most promising GaN transistors, as they do not have the limitations of Si mosfets. Currently, there are two commercial e-mode transistors: the Schottky Gate (SG) p-GaN and the HD-GIT (Hybrid-Drain-embedded Gate Injection Transistor) transistors. However, they differ from the gate terminal standards that have been defined for years by Silicon IGBTs and mosfets (lower threshold voltage, nonconstant Miller plateau, etc.), complicating their adoption in power electronics converters. This is particularly true for the HD-GIT transistor, which diverges from standard mosfet gate operations due to its nonisolated gate terminal. To aid application engineers in understanding these devices and facilitating their adoption in real power applications, simulation models are useful tools. However, there are no simple HD-GIT transistor models that can be easily parameterized by application engineers. Therefore, in this work, an experimentally verified behavioral model of an HD-GIT transistor is presented and described.

关键词： SiC trench MOSFET   Schottky contact   Reverse performances   Reliability   Switching characteristics  

摘要： This paper presents a novel deep trench-type SiC MOSFET integrated with Schottky diodes (DT-JMOS) designed to improve oxide reliability and switching performances. In contrast to conventional SiC trench MOSFET with Schottky diodes (CT-JMOS), the DT-JMOS utilizes a narrower JFET region and a P-bot structure, resulting in superior electric field reductions in gate oxide layer to improve reliability. The unique structure also enables double-channel operation and deeper embedded Schottky contacts, significantly enhancing the current conduction capabilities in both the first and third quadrants. Furthermore, simulation results indicate that the DTJMOS achieves a 97.6 % decrease in gate-to-drain capacitance (Cgd), leading to a 67.5 % improvement in gate-todrain charge (Qgd), and eventually resulting in reductions by factors of 3.2 and 3.5 for figure of merit Qgd x Ron,sp and total switching losses (Etotal), respectively. These attributes suggest that the DT-JMOS is more suitable for high-voltage and high-frequency applications.

关键词： Coils   Protection   Bandwidth   Silicon carbide   MOSFET   Frequency measurement   Resonant frequency   Gain   Current measurement   Broadband communication   Drift and droop errors   high bandwidth   medium-voltage (MV) SiC mosfet   overcurrent protection   Rogowski coil  

摘要： To guarantee safe switching of the expensive medium-voltage (MV) device with limited durability, the overcurrent protection scheme based on Rogowski coil current sensor (RCCS) is the promising method, featuring fast response and galvanic isolation. However, it is an inherent contradiction to achieve the RCCS with both high noise immunity and high-bandwidth capabilities. In addition, the nonideal dc and low-frequency characteristics of the integrator cause drift and droop errors. In this article, to address the aforementioned challenges, the broadband RCCS is developed and integrated into the overcurrent protection circuit for the MV SiC mosfet. The novel coil is designed based on the transmission line theory to overcome the constraints imposed by parasitic components on bandwidth. The proposed coil achieves an extra-high bandwidth of approximate 300 MHz with high mutual inductance and shielding layers for high noise immunity. Furthermore, the broadband integrator design method with low-frequency attenuation is proposed to eliminate drift and reduce droop errors significantly. Based on the developed RCCS, the proposed overcurrent protection circuit reacts to both the fault under load and hard switching fault rapidly and softly turns off the device within merely 200 ns. Comprehensive experiments demonstrate its exceptional potential in monitoring current and protecting the expensive MV devices.

关键词： Power MOSFET  

摘要： The parallelling of power semiconductor devices is essential for desired current ratings and the system is prone to the current unbalancing due to parameter variations. SiC devices with significant variable threshold voltage due to manufacturing yield and temperature distribution have a consequential possibility of dynamic current unbalancing. This paper presents the peak detection-based current balancing of parallel-connected SiC devices to minimize the turn-on and turn-off current unbalancing. PCB current sensors are used for the measurement and feedback of the signal for this peak detection-based current balancing mechanism. © 2025

关键词： Logic gates   Inductance   Threshold voltage   MOSFET   Silicon carbide   Resistance   Aging   Transient analysis   Switches   Stress   Asymmetric layout   current sharing   parallel connection   silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs)   stray inductance   threshold voltage  

摘要： For high-capacity applications, paralleling multiple silicon carbide (SiC) metal oxide semiconductor field effect transistors (mosfets) is essential. However, it is challenging to achieve complete symmetry in the gate circuits of parallel devices, resulting in mismatched gate inductances, which may lead to the current imbalance. This article focuses on investigating the evolution of threshold voltage dispersity under mismatched gate inductances and its impact on the current sharing evolution. It is found that mismatched gate inductances cause the threshold voltage dispersity to increase with gate stress time, thereby inducing a deterioration in current sharing. A boost converter with two devices in parallel was tested, demonstrating that the difference in the minimum turn-off gate voltage including undershoot is the primary trigger for increased threshold voltage dispersity. Besides, an off-state gate voltage optimization strategy was proposed to effectively mitigate the increase in threshold voltage dispersity and improve the evolution of current sharing under mismatched gate loop inductances. The findings are intended to improve the performance of SiC mosfets in parallel applications.