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关键词： 换流变压器   分接开关   故障分析   控制同步   运维措施  

摘要： 通过一起实际案例,分析了换流变压器分接开关档位故障的原因。阐述了档位故障时档位的机械指示与上送的档位信号间的差异及其原因。通过检查分接开关相关设备确定了故障原因。进一步,分析了换流变压器分接开关自动控制同步原理,从而解释了故障过程中分接开关发生误动作的原因。此外,还提出了换流变压器分接开关运维措施。

关键词： 预防为主   健康养殖   水产养殖   孢子虫   南美白对虾   厄尔尼诺   养殖对虾   中草药  

摘要： 今年上半年,广东受到厄尔尼诺的影响,最长持续降雨1个月。这对水产养殖十分不利,特别是外塘养殖南美白对虾,雨水多发导致弧菌、孢子虫等病害频发,养殖户不胜其烦。据了解,今年华南地区外塘养殖南美白对虾成功率仅2~3成,加之今年虾价低迷,不少外塘养殖户都失去信心。外塘养殖接下来的希望在哪?如何做才能提高外塘养殖的成功率呢?吴汉灵在南沙养殖对虾20多年了,一直崇尚健康养殖的理念,当外塘养殖弧菌、孢子虫等病害频发之时,他用“预防为主,健康养殖”的理念,将虾养得又大又靓。

关键词： SiC MOSFET   FEM   Al melting   Temperature-dependent   High temperatures   Gate damage   Short-circuit  

摘要： Understanding the electrothermal behavior of SiC MOSFET power devices under extreme operation conditions, such as short circuits, is crucial for their application certification. However, simulating short circuits in electronic components is challenging due to the necessity of a comprehensive thermal and electrical Multiphysics model that incorporates material laws and respects elevated temperatures with broad ranges. It is also needed to model the melting of the topside Al electrode. The paper presents for the first time a 2D electrothermal FEM that simulates the thermodynamic behavior of SiC MOSFET at high temperatures transistors under short-circuit conditions, including wide-range temperature-dependent material property laws. This work models the Al phase transition by considering the apparent heat capacity method and including the latent heat absorbed during the Al solid-liquid phase change (PC). The geometric accuracy of this study provides significant added values compared to existing 1D models. It was deduced that including the temperature-dependent material laws highly impacted the results. The rise in SiC junction temperature led to a delay in the onset of Al melting. It also impacted the progression manner of the Al melting process after the formation of new melting fronts.

关键词： Clamps   Electrostatic discharges   Layout   MOSFET   Logic gates   MOSFET circuits   Integrated circuit modeling   Clamp circuit   electrostatic discharge (ESD)   feedback   parasitic capacitance  

摘要： In this article, a feedback-enhanced power clamp circuit for ON-chip electrostatic discharge (ESD) protection is proposed and verified using silicon data. To conserve the layout area, the conventional MOSFET capacitor is replaced with a parasitic n-well/p-substrate junction capacitor to detect ESD events. The feedback mechanism is carefully designed to prolong the turn-on duration of the clamp circuit, thereby enhancing the ESD robustness. Experimental results show that the proposed clamp, featuring a 2000 $\mu$ m wide clamping MOSFET, achieves a comparable transmission line pulsing (TLP) failure current of approximately 9.5 A when compared to the conventional RC triggered counterparts. Simultaneously, it reduces the layout area, enhances false triggering immunity, and enhances the robustness during long pulse events.

关键词： Triple metal gate engineering   Junctionless   Si nanowire MOSFET biomolecule sensor   DD   ID   SS   DIBL  

摘要： In the present work Dielectric Modulation (DM) technique along with Triple Metal (TM) gate engineering has been used for the junctionless (JL) cylindrical gate all around (CGAA) Si nanowire (NW) MOSFET based biosensor for label free electrical detection of neutral biomolecules species like Uricase, Streptavidin, Protein, Biotin, ChOx (choline oxidase), and APTES etc. For this device, the Drift Diffusion approach has been used along with self -consistent solution of Schrodinger's equation with Poisson's equation. For the biomolecule immobilization, a nanogap cavity region is formed in the JL SiNW MOSFET by etching gate oxide layer above the SiO 2 interfacial layer. The change in the drain current ( I D ), threshold voltage ( V th ), off -current sensitivity ( S Ioff ), threshold voltage sensitivity ( S Vth ) and I on / I off current ratio of the device have been considered as the sensing parameters for detection of biomolecules under dry environment condition. In present work a new sensing metric of sensing of biomolecules - DIBL has been added which has never been reported in literature. In this work for JL SiNW, sensitivity metrics like smaller DIBL -50.47 mV/V, higher S Ioff 9 .33 x 10 5 , higher S Vth 28 .72, nearly ideal subthreshold slope (SS) -60 mV/dec, and higher I on / I off current ratio -9.01 x 10 12 have been obtained in comparison to available literature results.

关键词： motor drive   inverter leg   dead time   switching losses   reverse conduction   GaN FET   MOSFET  

摘要： This paper investigates the commutation transients of MOSFET and GaN FET devices in motor drive applications during hard-switching and soft-switching commutations at dead time operation. This study compares the switching behaviors of MOSFETs and GaN FETs, focusing on their performance during dead time in inverter legs for voltage source inverters. Experimental tests at various phase current levels reveal distinct switching characteristics and energy dissipation patterns. A validated simulation model estimates the experimental energy exchanged and dissipated during switching transients. The results demonstrate that GaN FETs exhibit lower overall losses at shorter dead times compared to MOSFETs, despite higher reverse conduction voltage drops. The study provides a quantitative framework for selecting optimal dead times to minimize energy losses, enhancing the efficiency of GaN FET-based inverters in low-voltage motor drive applications. Finally, a dead time optimization strategy is proposed and described.

关键词： P-i-n diodes   Schottky diodes   Anodes   Junctions   Transistors   Mathematical models   MOSFET   Body diode inactivation   breakdown   freewheeling diodes   gallium nitride (GaN)   merged pn-Schottky (MPS) diodes   monolithic integration   reverse recovery   Schottky barrier diodes (SBDs)   trench MOSFETs   vertical transistors  

摘要： We report 1.2-kV-class GaN-based vertical trench MOSFETs (T-MOS) with monolithically integrated merged pn-Schottky (MPS) diodes (MPS-MOS) by numerical simulation. The proposed MPS-MOS possesses excellent freewheeling capability, homogenized electric field distribution, as well as enhanced breakdown voltages as compared to conventional GaN vertical T-MOS with intrinsic bipolar body p-i-n diodes. With optimum design parameters by numerical simulation, the MPS-MOS exhibits a reverse turn-on voltage of - 0.75 V during the third-quadrant operation, a breakdown voltage of 1435 V, and a reduced reverse recovery current ( I-rr) and charge ( Q(rr)) by 55% and 71%. In addition, a potential approach is provided in this work to suppress the action of the intrinsic body p-i-n diodes, and the principle of the inactivation is explored from the perspective of energy band engineering and carrier distribution modulation. These results reveal great potential of monolithically integrated GaN-based vertical MPS-MOS for high-voltage, high-power density, and high-frequency applications in modern power systems.

关键词： power MOSFET   temperature measurement  

摘要： In order for full utilization of the switching devices and safe continued operation of the power converter at the same time, the junction temperature of the switching devices needs to be accurately monitored without shutting down the motor drive. This paper derives an analytical junction temperature calculation method by using Laplace transformation and thermal network theory. Based on an actual motor drive, a simulation model is established using platform for power electronic systems (PLECS). Through comparison, the derived method is proven to be able to calculate junction temperature accurately. Accurately monitoring the junction temperature online is essential for the safety of the switching devices, the full utilization of their capacity and the safe continued operation of the power converter. This paper derives an analytical junction temperature calculation method based on Ohm's law of thermal network and the Laplace transform. By comparing the PLECS simulation results, the validity and accuracy of the derived method are verified. image

关键词： MOSFET   THD   SPWM   inverter   delay   signal correction  

摘要： In the inverter circuit, the speed at which the MOSFET is impacted by the presence of a parasitic inductor within the printed circuit board (PCB) leads to a delay in the switching process. Furthermore, the parasitic inductor within the circuit can easily form an LC oscillation with the parasitic capacitor of the MOSFET. These two issues result in an inconsistency between the actual output of the MOSFET and the driving signal waveform, leading to distortion in the sinusoidal pulse width modulation (SPWM) waveform and an increase in total harmonic distortion (THD). It is a common practice to mitigate gate oscillation by introducing a resistor at the gate of the MOSFET. However, elevating the resistance leads to deceleration in the charging process of the MOSFET's parasitic capacitor, consequently causing an increase in the switching delay, and thereby increasing THD. Therefore, an effective strategy to reduce THD is proposed in this paper, while augmenting the gate resistance, computing the MOSFET switching delay, and applying corrective compensation. In this way, the inherent issues of the switch are addressed, resulting in inverter output waveforms that closely resemble sine waves and reduced THD. Through a combination of simulation and empirical experimentation, the efficacy of the proposed approach in significantly reducing THD in the inverter's output waveform has been empirically substantiated.

关键词： MOSFET devices  

摘要： SiC double trench MOSFETs have the advantage of generating a deep P+ layers through the trench source, effectively mitigating electric field crowding at the bottom edge of the gate oxide. However, the depletion region induced by the deep P+ layers narrows the current path between the gate and P+, resulting in an increase in the on-resistance. In this study, we addressed this problem by introducing CSLs through ion implantation in the 1.2 kV SiC double trench MOSFETs. CSL concentration optimization resulted in a 3.92 % decrease in on-resistance and a 3.19 % increase in the figure of merit. Therefore, the SiC double trench MOSFET with optimized CSL concentration has improved on-resistance characteristics and figure of merit compared to the conventional structure. © The Korean Institute of Electrical Engineers.