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关键词： Topology   Coils   Voltage   Inverters   Switches   Frequency control   MOSFET   Three-coil inductive power transfer   constant current   constant voltage   zero phase angle  

摘要： High-efficiency battery charging applications require constant current (CC) and then constant voltage (CV) two-stage charging. This brief proposes a three-coil inductive power transfer (IPT) charger through circuit reconfiguration to achieve load-independent CC and CV outputs. In addition, zero phase angle (ZPA) operation can be obtained in both CC and CV modes. This IPT charger can be reconfigured as SS compensated two-coil structure with CC characteristic and S-S-S compensated three-coil structure with CV characteristic by controlling the MOSFETs in the T-type inverter. Different from existing methods such as closed-loop control, hybrid topology switching, and frequency switching, this IPT charger avoids complex controller design, redundant compensation components, additional AC switches and the associated driving circuits, frequency out of bounds issues. Therefore, the proposed system features easy control, simple structure, low cost, and close to actual needs. A confirmatory experimental prototype with 2.5A/60V charging output is built to verify the feasibility and rationality of the proposed IPT charger.

关键词： Logic gates   Gate drivers   MOSFET   RLC circuits   Silicon carbide   Switching circuits   Power demand   Gate-drive circuits   metal-oxide-semiconductor field effect transistor (MOSFETs)   power MOSFET   resonant circuits   resonant gate driver (RGD)   silicon carbide (SiC)  

摘要： This article proposes design and implementation of a new multiresonant gate driver circuit for silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs). The proposed gate driver circuit consumes less power than a conventional gate driver (CGD) circuit at high switching frequency applications. Power consumption in the gate driver circuit is proportional to the operating switching frequency and is significant in higher switching frequency applications. A CGD circuit can provide unipolar gate pulses and all the energy provided to the gate driver is dissipated in the gate resistance. A resonant circuit can be used to recycle part of the energy stored in the gate capacitance and reduce the overall power consumption by the gate driver. For efficient operation of the MOSFET, it is desirable to provide unequal voltage levels during switching operation. In this study, a novel gate driving circuit is presented, which provides unequal voltage levels with clamping functionality utilizing higher order harmonics. A detailed analysis of the gate driving power loss is provided. In addition, detailed design procedure, and experimental verification are presented. According to the experimental results, the proposed gate driver can reduce up to 65% of the gate driver power consumption compared to a CGD circuit.

关键词： Power MOSFET   Specific ON resistance   Trench gate   Break down voltage  

摘要： In this work, we design and simulate a high performance electrostatically doped dual buried gates power MOSFET (EDDBGP-MOS) structure. The novelty of the proposed device is three folds. Firstly, the n + source and P + body regions of the device are realized using induced charge plasma by employing metal electrodes on the silicon film. The device thus reduces the risk of random doping fluctuations and the formation of highly abrupt junctions during fabrication. The high temperature processes involved in defining the doped regions are not required, thus providing low thermal budget. Secondly, the Gaussian hole plasma profile in the p body region allows increase in drift doping concentration from 5 x 1015/cm3 to 7 x 1015/cm3 resulting in Ron reduction to almost 24% of its uniformly doped counterpart structure, with only a slight reduction in breakdown voltage of the device. The proposed device thus provides 10% increase in the Baliga's figure of merit (FOM1 = BV2/Rsp). Further, the linearly graded Gaussian profile at the source side reduces the source coupling with gate. The gate charge together with the reduced specific ON resistance value provides as good as 19% reduction in Baliga's high frequency figure of merit FOM2 = ***). As compared to the conventional trench MOSFET structure, the two buried gates in the proposed structure provides low gate drain coupling along with the suppression in parasitic BJT effect. A two-dimensional simulation study of the proposed EDDBGP-MOS device reveals that it outperforms the conventional trench MOSFET device in terms of the performance parameters of power devices, along with the reduced fabrication complexity.

关键词： MOSFET   Silicon carbide   Logic gates   Iron   Faces   Annealing   Anisotropic magnetoresistance   Channel mobility   p-channel   metal-oxide-semiconductor field-effect transistor (MOSFET)   silicon carbide (SiC)  

摘要： The p-channel MOSFETs on 4H-SiC ( 1100 ) and ( 1120 ) with various donor concentrations of n-body ( 10(15) - 10(17) cm(-3) ) were fabricated. The gate oxide was formed by oxidation followed by NO annealing. The ( 1100 ) and ( 1120 ) MOSFETs exhibited about two-fold mobility on (0001). The highest mobility of 28 cm(2)/Vs ever reported for SiC p-channel MOSFETs was achieved on ( 1100 ). The interface state density near the valence band edge on ( 1100 ) and ( 1120 ) is lower than that on (0001). It was found that the channel mobility perpendicular to the c-axis is 20-50% higher than that parallel to the c-axis. The anisotropy of channel mobility originates from the anisotropy of effective mass of holes in the inversion layer, which is based on the calculation of the effective mass taking account of three different holes (heavy hole, light hole, and crystal-field split-off hole) in 4H-SiC and quantum confinement effects in the inversion layer.

关键词： Logic gates   Electrostatic discharges   HEMTs   MODFETs   Robustness   Junctions   MOSFET   ESD   gate current   p-GaN gate HEMT   pulsed I-V   SiC MOSFET  

摘要： The forward gate human-body-model (HBM) electrostatic discharge (ESD) robustness and mechanisms of the Schottky-type p-GaN gate HEMTs are investigated. Unexpectedly, the transient forward gate leakage current ( I-G ) is high during appreciable, yet non-destructive, discharge events. To characterize the elevated I-G more comprehensively, we use SiC MOSFETs to devise a new pulsed I-V test system. This system is capable of generating voltage pulses with a rise time of <= 10 ns and width of <100 ns, and a maximum pulse current of 26 A. The pulsed I-G - V-G (gate voltage) characteristics' temperature and time dependencies suggest that the high transient I-G is primarily governed by electron thermionic emission across the AlGaN barrier. This emission is stimulated by the dynamic capacitive V-G division within the two back-to-back junctions of the p-GaN gate stack rather than by the resistive V-G division observed in the steady-state conditions.

关键词： Regulators   Voltage control   MOSFET   Rails   Resistors   Regulation   Photonic band gap   Application specific integrated circuits (ASIC)   low dropout (LDO) regulators   photodetectors   power integrated circuits   radiation hardening (electronics)   semiconductor detectors  

摘要： The use of silicon photomultipliers (SiPMs) to detect light signals in highly radioactive environments presents several challenges, particularly due to their sensitivity on radiation, temperature, and overvoltage, requiring proper management of their bias supply. This article presents the design and performance of ALDO2, an application-specific integrated circuit (ASIC) and power management solution tailored for SiPM-based high-energy physics (HEP) detectors. The chip's functions include adjustable and point-of-load (PoL) linear regulation of the SiPM bias voltage (10-70 V, 50 mA), monitoring of SiPM current, shutdown, and overcurrent and overtemperature protection. The same functions are also available for the low-voltage (LV) regulator (1.6-3.3 V, 800 mA) used to generate the power supply of SiPM readout chips that often demand stable and well-filtered input voltages while consuming currents of up to several hundred milliamperes. The chip is intended to operate in radioactive environments typical of particle physics experiments, where it must withstand significant levels of radiation (total ionizing dose (TID) and 1-MeV-equivalent neutron fluence in the range of Mrad and 10(14) n(eq)/cm(2), respectively). The article provides a comprehensive description of the chip design as well as experimental measurements, offering insights into the chip's performance under various conditions. Finally, radiation hardening, radiation qualification, and reliability are discussed.

关键词： Nonvolatile memory   Logic gates   Silicon   Optical waveguides   Writing   Photonics   Electron traps   Optoelectronic memory   floating gate   non-volatile   storage   MOSFET   FGMOS  

摘要： A novel non-volatile opto-electronic memory at a wavelength of 850 nm is presented. The memorization principle exploits the same concept of floating-gate metal-oxide-semiconductor (FGMOS) memories, i.e. the trapping of charges in a floating gate. The basic memory cell of the Photon-Triggered FGMOS (PTFGMOS) is realized through the physical combination of a FGMOS and a silicon waveguided structure;each photon absorbed by silicon generates an electron-hole pair. The high voltage applied to the control gate of the FGMOS attracts the generated free electrons towards the floating gate, trapping them (tunnel effect) even after the control gate voltage is lowered. Hence, the electrons trapped in the floating gate affect the threshold voltage of the MOSFET, thus making the memory easily readable electrically. The device provides a useful way to directly store the information from the optical to the electrical domain. The footprint of the designed PTFGMOS single cell is 5 mu m x 2 mu m.

关键词： SiC MOSFETs   short-circuit withstand time   high-frequency figure of merit (HF-FOM)   device reliability  

摘要： In this letter, a novel Split-Gate SiC MOSFET is proposed by introducing a P+ buffer (SG-PB-MOS) into the JFET region. The P+ buffer serves to enhance device oxide reliability by mitigating the peak oxide electric field (E-max) . Besides, the P+ buffer facilitates depletion of the JFET region under high drain voltage, suppressing the short-circuit current. The SG-PB-MOS, Split-Gate MOSFET (SG-MOS), and conventional MOSFET (C-MOS) are systematically characterized through TCAD simulations. Cell-level parameter distributions are observed and analyzed to validate the efficacy of the proposed structure. In blocking states, the SG-PB-MOS demonstrates the mildest Emax . Moreover, compared to the C-MOS and SG-MOS, the SG-PB-MOS exhibits a 1.5x and 2.1x improvement in short-circuit withstand time (SCWT), a 5.2x and 2.4x improvement in high-frequency figure-of-merit (HF-FOM, R-on x Q(gd)) , respectively. Notably, these enhancements are achieved with negligible impact on R-on. As a result, SG-PB-MOSFET shows superior trade-offs in both R-on & E-max, Ron & SCWT, and R-on & Q(gd), making it suitable for high reliability and high power-density applications.

关键词： Ignition systems   dynamic modeling   free response   frequency response   MOSFET   IGBT  

摘要： This paper envisages studying the features of a conventional inductive ignition system along with its MOSFET and IGBT-based transistorized modifications. The influence of mechanical contact breaker dynamics and ignition coil characteristics on the current and voltage waveforms of the primary and secondary circuits of these studied ignition systems are mathematically and experimentally exposed. The investigation is considered necessary prior to attempting subsequent modeling and diagnostics procedures on the current-voltage performance characteristics of conventional and transistorized ignition systems. The work has demanded the development of an experimental setup based on a basic modifiable ignition system mockup and an instrumentation system to measure and analyze the voltage-current parameters of inductive ignition systems. The paper describes the design details of such instrumentation system, presents mechanical and electrical models for contact breaker and ignition circuits, then simulated to obtain base free-run response waveforms and electrical continuity behavior of the contact. A test of frequency response of the ignition coil provided additional input to the model. An experimental test of continuity of the contact, in agreement with its model, shed light on the actual excitation of the primary coil. The work comments on a sample of the registered current and voltage waveforms in primary and secondary coil windings of the ignition system at atmospheric conditions. Comparisons of waveforms and energy for mechanical contact, MOSFET and IGBT switches are made to establish them as a reference for future tests.

关键词： photovoltaic driver   MOSFET   JFET driver  

摘要： Newly introduced Photovoltaic (PV) devices, featuring a built-in chip with an illuminating Light Emitting Diode (LED), have emerged in the commercial market. These devices are touted for their utility as both low- and high-side power switch drivers and for data acquisition coupling. However, comprehensive knowledge and experimentation regarding the limitations of these Photovoltaic Drivers in both switching and signal processing applications remain underexplored. This paper presents a detailed characterization of a Photovoltaic Driver, focusing on its performance under resistive and capacitive loads. Additionally, it delineates the device's constraints when employed in signal processing. Through the analysis of switching losses across various power switches (Silicon and Silicon Carbide) in both series and parallel driver configurations, this study assesses the driver's efficacy in operating Junction Field-Effect Transistors (JFETs). Findings suggest that Photovoltaic Drivers offer a low-cost, compact solution for specific applications, such as high-voltage, low-bandwidth measurements, and low-speed turn-on with fast turn-off power switching scenarios, including solid-state switches and hot-swap circuits. Moreover, they present a straightforward, cost-effective method for driving JFETs, simplifying the circuit design and eliminating the need for an additional negative power source.